1. Field of the Invention
The present invention relates to a semiconductor device having a structure in which an interconnection is buried in an opening formed in an interlevel insulating film and, more particularly, to a semiconductor device in which damage to an interlevel insulating film is prevented to increase the manufacturing yield, and a method of manufacturing the same.
2. Description of the Prior Art
With recent high integration degrees of semiconductor devices, micropatterning of interconnections is demanded. For such a fine interconnection, contact and through holes for connecting conductive layers or interconnections respectively formed on the upper and lower surfaces of an interlevel insulating film must be particularly small. For this purpose, the structure of a contact or through hole in which an opening reaching a lower conductive layer or interconnection is formed in an interlevel insulating film, and an interconnection material is buried in this opening is proposed. For example, according to the technique disclosed in Japanese Unexamined Patent Publication No. 5-275366, as shown in FIG. 1A, a first metal interconnection 12 on a semiconductor substrate 11 is covered with an interlevel insulating film 13, then a via hole 14 is formed in the interlevel insulating film 13, and a tungsten film 15 is formed on the entire surface including the via hole 14. The tungsten film 15 is polished by chemical mechanical polishing (to be referred to as CMP hereinafter) until the tungsten film 15 on the surface of the interlevel insulating film 13 is removed. As a result, the tungsten film 15 is left only in the via hole 14. A plug (through hole) is formed in this manner, and permits one to electrically connect the first metal interconnection 12 to a second metal interconnection 16 to be formed.
Since the plug structure using CMP has high flatness on the surface of the interlevel insulating film 13, the coverage of the second upper metal interconnection 16 is high, and so-called poor step coverage and the like can be prevented, which is advantageous in micropatterning the interconnection. In this CMP, however, if the tungsten film 15 is excessively polished, the surface of the interlevel insulating film 13 is also polished and may be scratched. That is, a slurry of alumina particles is used as an abrasive in polishing the tungsten insulating film 13 along with the progress of the polishing, scratches 13a are generated on the surface of the interlevel insulating film 13 by hard alumina particles, as shown in FIG. 1B.
The generation of scratches adversely affects the cladding of the second metal interconnection 16 formed on the surface of the interlevel insulating film 13, pattern etching, and the like. Consequently, the reliability of the resultant semiconductor device decreases, and the manufacturing yield also greatly decreases.
The present invention has been made in consideration of the above situation in the prior art, and has as its object to provide a semiconductor device and manufacturing method in which the surface of an interlevel insulating film is prevented from being scratched in a CMP process, thereby increasing the reliability and the yield.
To achieve the above object, according to the first aspect of the present invention, there is provided a semiconductor device in which an interconnection material is buried in a hole formed in an interlevel insulating film arranged on a semiconductor substrate, comprising a protective layer formed on a surface of the interlevel insulating film that has a lower polishing rate than a polishing rate of the interconnection material in chemical mechanical polishing.
According to the second aspect of the present invention, there is provided a semiconductor device wherein the protective layer in the first aspect has a polishing rate ratio of not less than 10 to the interconnection material in chemical mechanical polishing.
According to the third aspect of the present invention, there is provided a semiconductor device wherein the protective layer in the first aspect is a reaction layer formed by performing, for the surface of the interlevel insulating film, plasma processing using at least one kind of gas selected from the group consisting of NH3 gas and N2 gas.
According to the fourth aspect of the present invention, there is provided a semiconductor device wherein the protective layer in the second aspect is a plasma oxide film formed on the surface of the interlevel insulating film.
According to the fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of forming an interlevel insulating film on a semiconductor substrate, forming a protective layer with a low polishing rate in chemical mechanical polishing on a surface of the interlevel insulating film, forming a hole in the interlevel insulating film, forming an interconnection material on the surface of the interlevel insulating film including the hole, and forming an interconnection by chemically mechanically polishing the interconnection material so as to leave the interconnection material in only the hole.
According to the sixth aspect of the present invention, there is provided a semiconductor device manufacturing method wherein the protective layer in the fifth aspect is a reaction layer formed by performing, for the surface of the interlevel insulating film, plasma processing using at least one kind of gas selected from the group consisting of NH3 gas and N2 gas.
According to the seventh aspect of the present invention, there is provided a semiconductor device manufacturing method, further comprising the step of forming, as the protective layer in the fifth aspect, a plasma oxide film having a polishing rate ratio of not less than 10 to the interconnection material in chemical mechanical polishing.
As is apparent from the respective aspects, according to the present invention, the plasma processing layer or plasma oxide film is formed as a protective layer on the surface of the interlevel insulating film by plasma processing using NH3 gas or N2 gas. In polishing by CMP the interconnection material formed on the interlevel insulating film, the protective film protects the surface of the interlevel insulating film to prevent this surface from being scratched. With this structure, an upper interconnection layer and an insulating film can be formed with high quality, and high reliability and high manufacturing yield of the semiconductor device can be obtained.
The above and many other advantages, features and additional objects of the present invention will become manifest to those versed in the art upon making reference to the following detailed description and accompanying drawings in which preferred embodiments incorporating the principles of the present invention are shown by way of illustrative examples.